As digital devices become more ubiquitous and integrated with daily life, more and more of our personal data will be manipulated by small cheap mobile embedded systems. Ensuring that these devices securely handle our sensitive information is of paramount importance. Some of the most effective attacks against cryptographic systems are not direct attacks on the cryptographic algorithms, but rather attack the hardware implementations of those algorithms, either by invasive or non-invasive means. Invasive probing of ICs can extract large amounts of information, but requires significant infrastructure and expertise. However, non-invasive techniques that use information leaked from the hardware implementations (so called "side-channel" information) to crack the cipher require only modest amounts of equipment (such as that found in any university electronics lab) and skill. Examples of such attacks use the power signature, electromagnetic emissions, or even sound emissions of the hardware. Integrated circuits for dedicated cryptography systems use a number of techniques to foil such invasive and non-invasive techniques incur high overheads in terms of area, power, delay, and cost. Thus they are not suitable for low-cost, low-power embedded ICs.
In this project, we are developing new, low-cost, low-overhead countermeasures against invasive and non-invasive attacks for embedded systems and field-programmable gate-arrays (FPGAs.) These include: new logic families that have constant power dissipation yet incur low area and power costs; novel memory circuits to avoid leaving remnants of past stored data; and techniques to use reconfigurability to enhance the security beyond even that dedicated custom secure ICs. The project will involve digital circuit design and VLSI implementation at the 18-322 level and beyond.